Lead Engineer - Hardware & System Architecture

Key Responsibilities

We are looking for a technically outstanding Lead Hardware Engineer with deep expertise in Battery Management Systems (BMS) to join our two-wheeler (2W) EV powertrain team. You will be the technical owner of the BMS hardware stack — from cell monitoring IC selection and analog front-end design to full system validation and regulatory certification. This role blends hands-on engineering depth with team leadership, owning the BMS hardware roadmap across multiple vehicle platforms. As the lead, you will collaborate daily with firmware, thermal, mechanical, and systems engineering teams, drive supplier qualification, and be the primary escalation point for BMS hardware issues across development and production.

BMS Architecture & Circuit Design

1. Own end-to-end BMS hardware architecture for 48V–96V Li-ion and LFP battery packs used in electric two-wheelers.
2. Design analog front-end (AFE) circuits: cell voltage sensing, current measurement (shunt / Hall-effect), temperature monitoring, and passive/active balancing topologies.
3. Select and qualify cell monitoring ICs (e.g., TI BQ series, Analog Devices LTC68xx, Renesas ISL94xxx) and develop evaluation test plans
4. Design isolated gate driver circuits for contactors and pre-charge relays; manage inrush current and protection schemes
5. Develop BMS hardware for multi-string configurations, supporting 3S–24S cell arrangements with ±5mV voltage accuracy and ±0.5% current accuracy
6. Define and own HV isolation requirements; design and verify creepage/clearance for safety-critical nets per IEC 60664

PCB & Schematic Design

1. Lead schematic capture and PCB layout review in Altium Designer or Cadence Allegro for multilayer BMS boards (6–12 layers).
2. Ensure signal integrity for high-resolution ADC paths; specify and review layout for EMI-sensitive analog circuits.
3. Drive Design for Manufacturability (DFM) and Design for Testability (DFT) reviews with contract manufacturers.
4. Establish PCB design guidelines for EV-grade thermal, vibration, and moisture environments (IP67 enclosures).
5. Own BOM cost reduction exercises without compromising reliability; engage with procurement on AVL management.

Protection & Safety Systems

1. Implement hardware-level protection: OVP, UVP, OCP, OTP, short-circuit detection with <1ms response time.
2. Design hardware safety loops independent of MCU firmware for fail-safe contactor control.
3. Own pre-charge circuit design and define time constants for capacitive loads in the powertrain.
4. Define and implement ASIL-B/C hardware requirements in collaboration with functional safety team (ISO 26262).
5. Develop hardware fault injection test plans and collaborate with firmware team on FMEA.

Verification, Validation & Certification

1. Define Hardware Verification & Validation (V&V) plan covering bench, pack-level, and vehicle-level test phases.
2. Own EMC pre-compliance testing; coordinate with accredited labs for CISPR/AIS 004 / AIS 123 certifications.
3. Lead DVT and PVT hardware sign-off; track and close HW NCRs before mass production.
4. Support AIS 156 (battery pack safety) compliance activities including abuse tests, thermal runaway validation, and insulation resistance checks.
5. Maintain hardware design documentation: schematics, PCB fab packages, test reports, and release notes in PLM/PDM systems.

Team Leadership & Cross-Functional Collaboration

1. Mentor junior hardware engineers; conduct design reviews and technical 1-on-1s.
2. Define hardware development milestones, manage technical risks, and track progress against program timelines.
3. Work with firmware engineers to define hardware-firmware interfaces; review firmware test benches for hardware compatibility.
4. Collaborate with cell engineers and thermal team on battery pack integration, cooling strategy, and thermal derating models.
5. Interface with ODMs and Tier-1 suppliers in India and Southeast Asia; own supplier qualification for BMS-critical components.
6. Support manufacturing engineering team on production test fixture (PTF) design and ICT/FCT spec definition.

Ideal Candidate

1. B.E. / B.Tech in Electronics & Communication, Electrical Engineering, or Instrumentation Engineering from a recognised institution.
2. M.Tech / M.S. in Power Electronics, Embedded Systems, or related discipline is preferred.
3. 3-8 years of total hardware engineering experience in automotive, EV, industrial, or energy storage domains.
4. Minimum 5 years of hands-on BMS hardware design experience, including full product lifecycle from concept through mass production.
5. Experience with Li-ion, LFP, NMC, or NCA cell chemistry — understanding of charge/discharge profiles, SoC estimation hardware implications, and capacity fade.
6. Proven track record of designing and releasing a hardware product that entered mass production (>10,000 units).
7. Expert proficiency in Altium Designer or Cadence Allegro; KiCad exposure is acceptable: Schematic & PCB tools.
8. Hands-on design experience with at least one: TI BQ78350/BQ76952, ADI LTC6811/6820, Renesas ISL94212, or equivalent: Cell monitoring ICs.
9. Strong fundamentals in op-amp circuits, ADC/DAC selection, filter design, precision current measurement, and low-noise layout techniques: Analog design, UART, SPI, I2C, SMBus, CAN, LIN — hardware design and signal integrity: Communication interfaces.
10. Contactor driver circuits, pre-charge design, DC/DC converter integration, and MOSFet-based switching: Power electronics
11. Design with digital isolators (ADI iCoupler, TI ISO series), optocouplers, and isolated power supplies: Isolation, Oscilloscope, logic analyser, power analyser (Yokogawa/Hioki), and precision bench tools; LTSpice or Simulink/PLECS simulation: Measurement & debug.