DSP FPGA Engineer

Joby Aviation

Santa Cruz, CA, USA

Full time

Trucks VC portfolio

May 3

Joby Overview

Located in Northern California, the Joby Aviation team is steadily working toward our goal of creating an affordable, all-electric air transportation system. Imagine an air taxi that takes off vertically, then quietly and quickly carries you over the traffic congestion below, giving you back the time that otherwise would have spent sitting in traffic. Since 2009, our team has been making this dream a reality, designing and flight testing a prototype aircraft capable of serving in a network of electric air taxis. We’re looking for talented individuals to join our team as we push onwards toward certifying the aircraft with the Federal Aviation Administration and preparing for commercialization with launch targeted in select markets for 2024.


The successful candidate will play a crucial role in building and optimizing the dependable sensing and computing systems needed to bring the dream of Urban Air Mobility to market. They will contribute on a team that is focused on implementing signal processing and algorithm accelerators in a combination of hardware and software. The successful candidate will excel in a highly collaborative environment to design and modify processing systems that can be rigorously defined, designed, characterized, and verified, ensuring the safe operation of our aircraft.


  • Work with FPGA, hardware, motor control, software, data, safety, and systems engineers to understand current and future DSP and processing needs, constraints, and challenges.
  • Design new and optimize existing fault-tolerant FPGA-based DSP blocks for sensor acquisition, motor control, navigation, and hardware emulation applications.
  • Develop directed testbenches for DSP blocks based on bit-accurate reference models and assist FPGA verification engineers as needed for more formal verification.
  • Work in a rigorous aircraft certification-focused development environment and create the required models and documentation for the definition, validation, and verification of requirements as needed.


Pursuant to various local, state, and federal regulations, you must show proof of your full COVID-19 vaccination status prior to your start date. Exemption requests are available for bona fide religious and medical circumstances.

  • Experience in FPGA or ASIC design in VHDL, Verilog, or SystemVerilog.
  • Experience using Matlab, Simulink, Python, or C for modeling signal processing systems.
  • Experience implementing fixed-point DSP blocks in RTL, such as IIR and FIR filters, PWM generators, delta-sigma modulators, PLLs, DFT/FFT processors, and CORDIC processors.
  • Familiarity with development in a Linux environment.
  • B.S./M.S./Ph.D. in relevant discipline (Electrical Engineering, Computer Science, Computer Engineering, Mechatronics, Physics, Mathematics, or similar field; or portfolio of designed and utilized FPGA/ASIC projects).


  • Experience with DO-254 FPGA compliance.
  • Experience with SEU mitigation for aviation or automotive applications.
  • Experience with C/C++ on embedded processing systems.
  • Experience with processor architecture and communications protocols, such as AXI, DMA, I2C, UART, SPI, SENT, and ethernet.
  • Experience with Xilinx FPGAs (Zynq, Artix) and Vivado toolchain experience, including creation of complex timing constraints.

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Joby Aviation

Electric Aerial Ridesharing